Testing load-reserve and store-conditional

This document describes the experiments we performed to test the semantics of the load-reserve (lwarx) and store-conditional (stwcx.) instructions.

Most of our results — in series “Main” and “Rfi’ — are comparisons of the output of our model and the output of hardware on tests.

Additionally, we experimentally check that hardware does not invalidate the theorem of Sec. 4.2, and we give a list of behaviours that we observed on Power6 only.

• Introduction
  • A typical table of results
  • Hand-written tests
  • Experiment report
• Main series: variation on systematic tests
• Rfi, variations on internal read-from
• Cycles up to four threads, free and atomised
• All behaviours observed on Power6 only
• All allowed yet unseen tests
• Model output missing
• Test set and kinds

This document was translated from L^AT_EX by H^EV^EA.