We witness a few model invalidations. Those are due to a difference in the reservation granularity: our models assume that, if a reservation and a store conditonal are made to different addresses, then the store conditional will always fail. By contrast, hardware reservations are at an unspecified granularity, likely a cache line. As a consquence, if two different locations x and y happen to reside in the same cache line, reserving location x and then attempting a store conditional on location y may succeed.
The following table lists the behaviours that are forbidden by herd model model, yet observed on hardware.
Herd | Power | Exp | Op | PowerG5 | Power6 | Power7 | |
RSV+FAIL+SIMPLE | Forbid | Ok, 8/109k | Forbid | Forbid | Ok, 3/35k | Ok, 1/38k | Ok, 4/36k |
RSV+SPEC0 | Forbid | Ok, 19/9.2G | Forbid | Forbid | Ok, 4/408M | Ok, 7/2.7G | Ok, 8/6.0G |
RSV+FAIL | Forbid | Ok, 4/4.7G | Forbid | Forbid | Ok, 1/204M | Ok, 2/1.4G | Ok, 1/3.0G |
The following table lists the behaviours that are forbidden by herd experimental model, yet observed on hardware.
Exp | Power | Herd | Op | PowerG5 | Power6 | Power7 | |
RSV+FAIL+SIMPLE | Forbid | Ok, 8/109k | Forbid | Forbid | Ok, 3/35k | Ok, 1/38k | Ok, 4/36k |
RSV+SPEC0 | Forbid | Ok, 19/9.2G | Forbid | Forbid | Ok, 4/408M | Ok, 7/2.7G | Ok, 8/6.0G |
RSV+FAIL | Forbid | Ok, 4/4.7G | Forbid | Forbid | Ok, 1/204M | Ok, 2/1.4G | Ok, 1/3.0G |