Test MP+dmb.sy+fri-rfi-ctrl-addr-ctrlisb

AArch64 MP+dmb.sy+fri-rfi-ctrl-addr-ctrlisb
"DMB.SYdWW Rfe Fri Rfi DpCtrldR DpAddrdR DpCtrlIsbdR Fre"
Cycle=Rfi DpCtrldR DpAddrdR DpCtrlIsbdR Fre DMB.SYdWW Rfe Fri
Relax=
Safe=Rfi Rfe Fri Fre DMB.SYdWW DpAddrdR DpCtrldR DpCtrlIsbdR
Prefetch=0:x=F,0:y=W,1:y=F,1:x=T
Com=Rf Fr
Orig=DMB.SYdWW Rfe Fri Rfi DpCtrldR DpAddrdR DpCtrlIsbdR Fre
{
0:X1=x; 0:X3=y;
1:X1=y; 1:X5=z; 1:X8=a; 1:X10=x;
}
 P0          | P1                  ;
 MOV W0,#1   | LDR W0,[X1]         ;
 STR W0,[X1] | MOV W2,#2           ;
 DMB SY      | STR W2,[X1]         ;
 MOV W2,#1   | LDR W3,[X1]         ;
 STR W2,[X3] | CBNZ W3,LC00        ;
             | LC00:               ;
             | LDR W4,[X5]         ;
             | EOR W6,W4,W4        ;
             | LDR W7,[X8,W6,SXTW] ;
             | CBNZ W7,LC01        ;
             | LC01:               ;
             | ISB                 ;
             | LDR W9,[X10]        ;
Observed
    y=2; x=1; 1:X9=0; 1:X3=2; 1:X0=1;