AArch64 MP+dmb.sy+data-wsi-rfi-addr-ctrlisb
"DMB.SYdWW Rfe DpDatadW Wsi Rfi DpAddrdR DpCtrlIsbdR Fre"
Cycle=Rfi DpAddrdR DpCtrlIsbdR Fre DMB.SYdWW Rfe DpDatadW Wsi
Relax=
Safe=Rfi Rfe Fre Wsi DMB.SYdWW DpAddrdR DpDatadW DpCtrlIsbdR
Prefetch=0:x=F,0:y=W,1:y=F,1:x=T
Com=Rf Fr
Orig=DMB.SYdWW Rfe DpDatadW Wsi Rfi DpAddrdR DpCtrlIsbdR Fre
{
0:X1=x; 0:X3=y;
1:X1=y; 1:X3=z; 1:X8=a; 1:X10=x;
}
P0 | P1 ;
MOV W0,#1 | LDR W0,[X1] ;
STR W0,[X1] | EOR W2,W0,W0 ;
DMB SY | ADD W2,W2,#1 ;
MOV W2,#1 | STR W2,[X3] ;
STR W2,[X3] | MOV W4,#2 ;
| STR W4,[X3] ;
| LDR W5,[X3] ;
| EOR W6,W5,W5 ;
| LDR W7,[X8,W6,SXTW] ;
| CBNZ W7,LC00 ;
| LC00: ;
| ISB ;
| LDR W9,[X10] ;
Observed
z=2; y=1; x=1; 1:X9=0; 1:X5=2; 1:X0=1;