Test RWC+poss

AArch64 RWC+poss
"Rfe PosRR Fre PosWR Fre"
Cycle=Rfe PosRR Fre PosWR Fre
Relax=
Safe=Rfe Fre PosWR PosRR
Prefetch=
Com=Rf Fr Fr
Orig=Rfe PosRR Fre PosWR Fre
{
0:X1=x;
1:X1=x;
2:X1=x;
}
 P0          | P1          | P2          ;
 MOV W0,#1   | LDR W0,[X1] | MOV W0,#2   ;
 STR W0,[X1] | LDR W2,[X1] | STR W0,[X1] ;
             |             | LDR W2,[X1] ;
Observed
    x=2; 2:X2=2; 1:X2=1; 1:X0=2;
and x=2; 2:X2=2; 1:X2=0; 1:X0=2;
and x=1; 2:X2=2; 1:X2=0; 1:X0=2;
and x=1; 2:X2=2; 1:X2=2; 1:X0=1;
and x=2; 2:X2=2; 1:X2=0; 1:X0=1;
and x=1; 2:X2=2; 1:X2=0; 1:X0=1;