Test R+popl+dmb.ldla

AArch64 R+popl+dmb.ldla
"PodWWPL WseLL DMB.LDdWRLA FreAP"
Cycle=FreAP PodWWPL WseLL DMB.LDdWRLA
Relax=
Safe=PodWW DMB.LDdWR FreAP WseLL
Prefetch=0:x=F,0:y=W,1:y=F,1:x=T
Com=Ws Fr
Orig=PodWWPL WseLL DMB.LDdWRLA FreAP
{
0:X1=x; 0:X3=y;
1:X1=y; 1:X3=x;
}
 P0           | P1           ;
 MOV W0,#1    | MOV W0,#2    ;
 STR W0,[X1]  | STLR W0,[X1] ;
 MOV W2,#1    | DMB LD       ;
 STLR W2,[X3] | LDAR W2,[X3] ;
Observed
    y=2; 1:X2=0;