Test MP+dmb.sy+addr-pos-fri-rfi-pos

AArch64 MP+dmb.sy+addr-pos-fri-rfi-pos
"DMB.SYdWW Rfe DpAddrdR PosRR Fri Rfi PosRR Fre"
Cycle=Rfi PosRR Fre DMB.SYdWW Rfe DpAddrdR PosRR Fri
Relax=
Safe=Rfi Rfe Fri Fre PosRR DMB.SYdWW DpAddrdR
Prefetch=0:x=F,0:y=W,1:y=F,1:x=T
Com=Rf Fr
Orig=DMB.SYdWW Rfe DpAddrdR PosRR Fri Rfi PosRR Fre
{
0:X1=x; 0:X3=y;
1:X1=y; 1:X4=x;
}
 P0          | P1                  ;
 MOV W0,#2   | LDR W0,[X1]         ;
 STR W0,[X1] | EOR W2,W0,W0        ;
 DMB SY      | LDR W3,[X4,W2,SXTW] ;
 MOV W2,#1   | LDR W5,[X4]         ;
 STR W2,[X3] | MOV W6,#1           ;
             | STR W6,[X4]         ;
             | LDR W7,[X4]         ;
             | LDR W8,[X4]         ;
Observed
    y=1; x=1; 1:X8=1; 1:X7=1; 1:X5=0; 1:X3=2; 1:X0=1;
and y=1; x=1; 1:X8=1; 1:X7=1; 1:X5=0; 1:X3=2; 1:X0=0;