AArch64 WRR+2W+addr+dmb.sy+X "RfeXP DpAddrdR Fre DMB.SYdWW WsePX" Prefetch=1:x=F,1:y=T,2:y=F,2:x=W Com=Rf Fr Ws Orig=RfeXP DpAddrdR Fre DMB.SYdWW WsePX { ok=1; 0:X0=x; 0:X5=ok; 1:X1=x; 1:X4=y; 2:X1=y; 2:X3=x; } P0 | P1 | P2 ; MOV W1,#2 | LDR W0,[X1] | MOV W0,#1 ; LDXR W2,[X0] | EOR W2,W0,W0 | STR W0,[X1] ; STXR W3,W1,[X0] | LDR W3,[X4,W2,SXTW] | DMB SY ; CBNZ W3,Fail0 | | MOV W2,#1 ; B Exit0 | | STR W2,[X3] ; Fail0: | | ; MOV W4,#0 | | ; STR W4,[X5] | | ; Exit0: | | ; exists (ok=1 /\ x=2 /\ 0:X2=1 /\ 1:X0=2 /\ 1:X3=0)