AArch64 W+RWC+dmb.sy+addr+pola
"DMB.SYdWW Rfe DpAddrdR FrePL PodWRLA FreAP"
Prefetch=0:x=F,0:y=W,1:y=F,1:z=T,2:z=F,2:x=T
Com=Rf Fr Fr
Orig=DMB.SYdWW Rfe DpAddrdR FrePL PodWRLA FreAP
{
0:X1=x; 0:X3=y;
1:X1=y; 1:X4=z;
2:X1=z; 2:X3=x;
}
P0 | P1 | P2 ;
MOV W0,#1 | LDR W0,[X1] | MOV W0,#1 ;
STR W0,[X1] | EOR W2,W0,W0 | STLR W0,[X1] ;
DMB SY | LDR W3,[X4,W2,SXTW] | LDAR W2,[X3] ;
MOV W2,#1 | | ;
STR W2,[X3] | | ;
exists
(1:X0=1 /\ 1:X3=0 /\ 2:X2=0)