AArch64 SB+poxxs+SYS2 "PodWRXX FreXX PodWRXX FreXX" Cycle=FreXX PodWRXX FreXX PodWRXX Relax=FreXX Safe=PodWR Prefetch=0:x=F,0:y=T,1:y=F,1:x=T Com=Fr Fr Orig=PodWRXX FreXX PodWRXX FreXX { 0:X0=x; 0:X4=y; 1:X0=y; 1:X4=x; } P0 | P1 ; MOV W1,#1 | MOV W1,#1 ; LDXR W2,[X0] | LDXR W2,[X0] ; STXR W3,W1,[X0] | STXR W3,W1,[X0] ; LDXR W5,[X4] | LDXR W5,[X4] ; STXR W6,W5,[X4] | STXR W6,W5,[X4] ; exists (x=1 /\ y=1 /\ 0:X6=0 /\ 0:X3=0 /\ 0:X2=0 /\ 0:X5=0 /\ 1:X6=0 /\ 1:X3=0 /\ 1:X2=0 /\ 1:X5=0)