Test SB+polas

AArch64 SB+polas
"PodWRLA FreAL PodWRLA FreAL"
Cycle=FreAL PodWRLA FreAL PodWRLA
Relax=
Safe=PodWR FreAL
Prefetch=0:x=F,0:y=T,1:y=F,1:x=T
Com=Fr Fr
Orig=PodWRLA FreAL PodWRLA FreAL
{
0:X1=x; 0:X3=y;
1:X1=y; 1:X3=x;
}
 P0           | P1           ;
 MOV W0,#1    | MOV W0,#1    ;
 STLR W0,[X1] | STLR W0,[X1] ;
 LDAR W2,[X3] | LDAR W2,[X3] ;
exists
(0:X2=0 /\ 1:X2=0)