Test MP+popx+poxp+SYS2

AArch64 MP+popx+poxp+SYS2
"PodWWPX RfeXX PodRRXP Fre"
Cycle=Fre PodWWPX RfeXX PodRRXP
Relax=RfeXX
Safe=Fre PodWW PodRR
Prefetch=0:x=F,0:y=W,1:y=F,1:x=T
Com=Rf Fr
Orig=PodWWPX RfeXX PodRRXP Fre
{
0:X1=x; 0:X2=y;
1:X0=y; 1:X4=x;
}
 P0              | P1              ;
 MOV W0,#1       | LDXR W1,[X0]    ;
 STR W0,[X1]     | STXR W2,W1,[X0] ;
 MOV W3,#1       | LDR W3,[X4]     ;
 LDXR W4,[X2]    |                 ;
 STXR W5,W3,[X2] |                 ;
exists
(y=1 /\ 0:X5=0 /\ 0:X4=0 /\ 1:X2=0 /\ 1:X1=1 /\ 1:X3=0)