Test ARMARM02

AArch64 ARMARM02
{
0:X1=x; 0:X3=y;
1:X1=y; 1:X4=x; 1:X3=-1;
2:X1=y; 2:X4=x; 2:X3=-1;
}
 P0           | P1                  | P2                  ;
 MOV W0,#1    | LDR W0,[X1]         | LDR W0,[X1]         ;
 STR W0,[X1]  | CMP W0,#1           | CMP W0,#1           ;
 MOV W2,#1    | B.NE Exit1          | B.NE Exit2          ;
 STLR W2,[X3] | EOR W2,W0,W0        | EOR W2,W0,W0        ;
              | LDR W3,[X4,W2,SXTW] | LDR W3,[X4,W2,SXTW] ;
              | Exit1:              | Exit2:              ;
~exists
(1:X0=1 /\ 1:X3=0 \/ 2:X0=1 /\ 2:X3=0)
(* ARM ARM, F.2.1, basically MP+popl+addr, with two readers *)