Test SB+dmb.sy+rfi-addr-ctrl-pos

AArch64 SB+dmb.sy+rfi-addr-ctrl-pos
"DMB.SYdWR Fre Rfi DpAddrdR DpCtrldR PosRR Fre"
Cycle=Rfi DpAddrdR DpCtrldR PosRR Fre DMB.SYdWR Fre
Relax=
Safe=Rfi Fre PosRR DMB.SYdWR DpAddrdR DpCtrldR
Prefetch=0:x=F,0:y=T,1:y=F,1:x=T
Com=Fr Fr
Orig=DMB.SYdWR Fre Rfi DpAddrdR DpCtrldR PosRR Fre
{
0:X1=x; 0:X3=y;
1:X1=y; 1:X5=z; 1:X7=x;
}
 P0          | P1                  ;
 MOV W0,#1   | MOV W0,#1           ;
 STR W0,[X1] | STR W0,[X1]         ;
 DMB SY      | LDR W2,[X1]         ;
 LDR W2,[X3] | EOR W3,W2,W2        ;
             | LDR W4,[X5,W3,SXTW] ;
             | CBNZ W4,LC00        ;
             | LC00:               ;
             | LDR W6,[X7]         ;
             | LDR W8,[X7]         ;
Observed
    y=1; x=1; 1:X8=0; 1:X6=1; 1:X2=1; 0:X2=1;
and y=1; x=1; 1:X8=0; 1:X6=1; 1:X2=1; 0:X2=0;