Test LB+data+pos-addr-fri

AArch64 LB+data+pos-addr-fri
"DpDatadW Rfe PosRR DpAddrdR Fri Rfe"
Cycle=Rfe PosRR DpAddrdR Fri Rfe DpDatadW
Relax=
Safe=Rfe Fri PosRR DpAddrdR DpDatadW
Prefetch=0:x=F,0:y=W,1:y=F,1:x=W
Com=Rf Rf
Orig=DpDatadW Rfe PosRR DpAddrdR Fri Rfe
{
0:X1=x; 0:X3=y;
1:X1=y; 1:X5=x;
}
 P0           | P1                  ;
 LDR W0,[X1]  | LDR W0,[X1]         ;
 EOR W2,W0,W0 | LDR W2,[X1]         ;
 ADD W2,W2,#1 | EOR W3,W2,W2        ;
 STR W2,[X3]  | LDR W4,[X5,W3,SXTW] ;
              | MOV W6,#1           ;
              | STR W6,[X5]         ;
Observed
    y=1; x=1; 1:X4=0; 1:X2=0; 1:X0=1; 0:X0=0;