Test WRC+dmb.st+dmb.ld

AArch64 WRC+dmb.st+dmb.ld
"Rfe DMB.STdRW Rfe DMB.LDdRR Fre"
Cycle=Rfe DMB.LDdRR Fre Rfe DMB.STdRW
Relax=
Safe=Rfe Fre DMB.LDdRR DMB.STdRW
Prefetch=1:x=F,1:y=W,2:y=F,2:x=T
Com=Rf Rf Fr
Orig=Rfe DMB.STdRW Rfe DMB.LDdRR Fre
{
0:X1=x;
1:X1=x; 1:X3=y;
2:X1=y; 2:X3=x;
}
 P0          | P1          | P2          ;
 MOV W0,#1   | LDR W0,[X1] | LDR W0,[X1] ;
 STR W0,[X1] | DMB ST      | DMB LD      ;
             | MOV W2,#1   | LDR W2,[X3] ;
             | STR W2,[X3] |             ;
Observed
    2:X2=0; 2:X0=1; 1:X0=1;