Test WRR+2W+fencembs

C WRR+2W+fencembs
Hash=40a63851364afd3b5b4f8c7a91576817
Cycle=Rfe FenceMbdRR Fre FenceMbdWW Wse
Relax=
Safe=Rfe Fre Wse FenceMbdWW FenceMbdRR
Generator=diy7 (version 7.46+1)
Prefetch=1:x=F,1:y=T,2:y=F,2:x=W
Com=Rf Fr Ws
Orig=Rfe FenceMbdRR Fre FenceMbdWW Wse

{}


P0(int* x) {
  WRITE_ONCE(*x,2);
}

P1(int* x,int* y) {
  int r0 = READ_ONCE(*x);
  smp_mb();
  int r1 = READ_ONCE(*y);
}

P2(int* x,int* y) {
  WRITE_ONCE(*y,1);
  smp_mb();
  WRITE_ONCE(*x,1);
}

Observed
    x=2; 1:r1=0; 1:r0=2;

C11 equivalent:

C WRR+2W+fencembs
Hash=40a63851364afd3b5b4f8c7a91576817
Cycle=Rfe FenceMbdRR Fre FenceMbdWW Wse
Relax=
Safe=Rfe Fre Wse FenceMbdWW FenceMbdRR
Generator=diy7 (version 7.46+1)
Prefetch=1:x=F,1:y=T,2:y=F,2:x=W
Com=Rf Fr Ws
Orig=Rfe FenceMbdRR Fre FenceMbdWW Wse

{}


P0(atomic_int* x) {
  atomic_store_explicit(x,2,memory_order_relaxed);
}

P1(atomic_int* x,atomic_int* y) {
  int r0 = atomic_load_explicit(x,memory_order_relaxed);
  atomic_thread_fence(memory_order_seq_cst);
  int r1 = atomic_load_explicit(y,memory_order_relaxed);
}

P2(atomic_int* x,atomic_int* y) {
  atomic_store_explicit(y,1,memory_order_relaxed);
  atomic_thread_fence(memory_order_seq_cst);
  atomic_store_explicit(x,1,memory_order_relaxed);
}

exists (x=2 /\ 1:r0=2 /\ 1:r1=0)