Test posrr001

PPC posrr001
"Fre SyncdWW Rfe SyncdRW Rfe PosRR DpdR PosRR"
Cycle=Fre SyncdWW Rfe SyncdRW Rfe PosRR DpdR PosRR
Relax=PosRR
Safe=Fre DpdR BCSyncdWW BCSyncdRW
{
0:r2=z; 0:r4=x;
1:r2=x; 1:r4=y;
2:r2=y; 2:r6=z;
}
 P0           | P1           | P2            ;
 li r1,1      | lwz r1,0(r2) | lwz r1,0(r2)  ;
 stw r1,0(r2) | sync         | lwz r3,0(r2)  ;
 sync         | li r3,1      | xor r4,r3,r3  ;
 li r3,1      | stw r3,0(r4) | lwzx r5,r4,r6 ;
 stw r3,0(r4) |              | lwz r7,0(r6)  ;
exists
(1:r1=1 /\ 2:r1=1 /\ 2:r3=1 /\ 2:r5=0 /\ 2:r7=0)