Test SB0015

PPC SB0015
"SyncdWR Fre PosWR PosRR DpCtrlIsyncdR Fre"
Cycle=Fre PosWR PosRR DpCtrlIsyncdR Fre SyncdWR
Relax=[Fre,SyncdWR,Fre]
Safe=PosWR PosRR DpCtrlIsyncdR
Prefetch=0:x=F,0:y=T,1:y=F,1:x=T
Com=Fr Fr
Orig=SyncdWR Fre PosWR PosRR DpCtrlIsyncdR Fre
{
0:r2=x; 0:r4=y;
1:r2=y; 1:r6=x;
}
 P0           | P1           ;
 li r1,1      | li r1,1      ;
 stw r1,0(r2) | stw r1,0(r2) ;
 sync         | lwz r3,0(r2) ;
 lwz r3,0(r4) | lwz r4,0(r2) ;
              | cmpw r4,r4   ;
              | beq  LC00    ;
              | LC00:        ;
              | isync        ;
              | lwz r5,0(r6) ;
exists
(0:r3=0 /\ 1:r5=0)