Test R0001

PPC R0001
"LwSyncdWW Wse PodWW PosWR DpAddrdR Fre"
Cycle=Fre LwSyncdWW Wse PodWW PosWR DpAddrdR
Relax=[Fre,LwSyncdWW,Wse]
Safe=PosWR PodWW DpAddrdR
Prefetch=0:x=F,0:y=W,1:y=F,1:x=T
Com=Ws Fr
Orig=LwSyncdWW Wse PodWW PosWR DpAddrdR Fre
{
0:r2=x; 0:r4=y;
1:r2=y; 1:r4=z; 1:r8=x;
}
 P0           | P1            ;
 li r1,1      | li r1,2       ;
 stw r1,0(r2) | stw r1,0(r2)  ;
 lwsync       | li r3,1       ;
 li r3,1      | stw r3,0(r4)  ;
 stw r3,0(r4) | lwz r5,0(r4)  ;
              | xor r6,r5,r5  ;
              | lwzx r7,r6,r8 ;
exists
(y=2 /\ 1:r7=0)