Test MP0185

PPC MP0185
"LwSyncdWW Rfe PodRR Fre"
Cycle=Rfe PodRR Fre LwSyncdWW
Relax=[Fre,LwSyncdWW,Rfe]
Safe=PodRR
Prefetch=0:x=F,0:y=W,1:y=F,1:x=T
Com=Rf Fr
Orig=LwSyncdWW Rfe PodRR Fre
{
0:r2=x; 0:r4=y;
1:r2=y; 1:r4=x;
}
 P0           | P1           ;
 li r1,1      | lwz r1,0(r2) ;
 stw r1,0(r2) | lwz r3,0(r4) ;
 lwsync       |              ;
 li r3,1      |              ;
 stw r3,0(r4) |              ;
exists
(1:r1=1 /\ 1:r3=0)