Test MP0002

PPC MP0002
"PosWR DpAddrdW Rfe DpAddrdR Fre"
Cycle=Rfe DpAddrdR Fre PosWR DpAddrdW
Relax=[Rfe,DpAddrdR,Fre]
Safe=PosWR DpAddrdW
Prefetch=0:x=F,0:y=W,1:y=F,1:x=T
Com=Rf Fr
Orig=PosWR DpAddrdW Rfe DpAddrdR Fre
{
0:r2=x; 0:r6=y;
1:r2=y; 1:r5=x;
}
 P0            | P1            ;
 li r1,1       | lwz r1,0(r2)  ;
 stw r1,0(r2)  | xor r3,r1,r1  ;
 lwz r3,0(r2)  | lwzx r4,r3,r5 ;
 xor r4,r3,r3  |               ;
 li r5,1       |               ;
 stwx r5,r4,r6 |               ;
exists
(1:r1=1 /\ 1:r4=0)