Test MP+PPO682

PPC MP+PPO682
"Fre LwSyncdWW Rfe DpAddrdR DpCtrldW PosWR"
Cycle=Rfe DpAddrdR DpCtrldW PosWR Fre LwSyncdWW
Relax=
Safe=Rfe Fre PosWR LwSyncdWW DpAddrdR DpCtrldW
Prefetch=1:x=T
Com=Rf Fr
Orig=Fre LwSyncdWW Rfe DpAddrdR DpCtrldW PosWR
{
0:r2=x; 0:r4=y;
1:r2=y; 1:r5=z; 1:r7=x;
}
 P0           | P1            ;
 li r1,2      | lwz r1,0(r2)  ;
 stw r1,0(r2) | xor r3,r1,r1  ;
 lwsync       | lwzx r4,r3,r5 ;
 li r3,1      | cmpw r4,r4    ;
 stw r3,0(r4) | beq  LC00     ;
              | LC00:         ;
              | li r6,1       ;
              | stw r6,0(r7)  ;
              | lwz r8,0(r7)  ;
exists
(x=2 /\ 1:r1=1 /\ 1:r8=1)