Test MP+PPO661

PPC MP+PPO661
"Fre LwSyncdWW Rfe DpDatadW PosWR DpAddrdR PosRR DpDatadW PosWR"
Cycle=Rfe DpDatadW PosWR DpAddrdR PosRR DpDatadW PosWR Fre LwSyncdWW
Relax=
Safe=Rfe Fre PosWR PosRR LwSyncdWW DpAddrdR DpDatadW
Prefetch=1:x=T
Com=Rf Fr
Orig=Fre LwSyncdWW Rfe DpDatadW PosWR DpAddrdR PosRR DpDatadW PosWR
{
0:r2=x; 0:r4=y;
1:r2=y; 1:r4=z; 1:r8=a; 1:r11=x;
}
 P0           | P1             ;
 li r1,2      | lwz r1,0(r2)   ;
 stw r1,0(r2) | xor r3,r1,r1   ;
 lwsync       | addi r3,r3,1   ;
 li r3,1      | stw r3,0(r4)   ;
 stw r3,0(r4) | lwz r5,0(r4)   ;
              | xor r6,r5,r5   ;
              | lwzx r7,r6,r8  ;
              | lwz r9,0(r8)   ;
              | xor r10,r9,r9  ;
              | addi r10,r10,1 ;
              | stw r10,0(r11) ;
              | lwz r12,0(r11) ;
exists
(x=2 /\ 1:r1=1 /\ 1:r12=1)