Test MP+PPO516

PPC MP+PPO516
"Fre LwSyncdWW Rfe PosRR DpAddrdR PosRR DpAddrdR DpAddrdW PosWR"
Cycle=Rfe PosRR DpAddrdR PosRR DpAddrdR DpAddrdW PosWR Fre LwSyncdWW
Relax=
Safe=Rfe Fre PosWR PosRR LwSyncdWW DpAddrdW DpAddrdR
Prefetch=1:x=T
Com=Rf Fr
Orig=Fre LwSyncdWW Rfe PosRR DpAddrdR PosRR DpAddrdR DpAddrdW PosWR
{
0:r2=x; 0:r4=y;
1:r2=y; 1:r6=z; 1:r10=a; 1:r13=x;
}
 P0           | P1               ;
 li r1,2      | lwz r1,0(r2)     ;
 stw r1,0(r2) | lwz r3,0(r2)     ;
 lwsync       | xor r4,r3,r3     ;
 li r3,1      | lwzx r5,r4,r6    ;
 stw r3,0(r4) | lwz r7,0(r6)     ;
              | xor r8,r7,r7     ;
              | lwzx r9,r8,r10   ;
              | xor r11,r9,r9    ;
              | li r12,1         ;
              | stwx r12,r11,r13 ;
              | lwz r14,0(r13)   ;
exists
(x=2 /\ 1:r1=1 /\ 1:r14=1)