Test MP+PPO376

PPC MP+PPO376
"Fre LwSyncdWW Rfe PosRR DpAddrdR DpAddrdW PosWW PosWR DpCtrlIsyncdR"
Cycle=Rfe PosRR DpAddrdR DpAddrdW PosWW PosWR DpCtrlIsyncdR Fre LwSyncdWW
Relax=
Safe=Rfe Fre PosWW PosWR PosRR LwSyncdWW DpAddrdW DpAddrdR DpCtrlIsyncdR
Prefetch=1:x=T
Com=Rf Fr
Orig=Fre LwSyncdWW Rfe PosRR DpAddrdR DpAddrdW PosWW PosWR DpCtrlIsyncdR
{
0:r2=x; 0:r4=y;
1:r2=y; 1:r6=z; 1:r9=a; 1:r13=x;
}
 P0           | P1             ;
 li r1,1      | lwz r1,0(r2)   ;
 stw r1,0(r2) | lwz r3,0(r2)   ;
 lwsync       | xor r4,r3,r3   ;
 li r3,1      | lwzx r5,r4,r6  ;
 stw r3,0(r4) | xor r7,r5,r5   ;
              | li r8,1        ;
              | stwx r8,r7,r9  ;
              | li r10,2       ;
              | stw r10,0(r9)  ;
              | lwz r11,0(r9)  ;
              | cmpw r11,r11   ;
              | beq  LC00      ;
              | LC00:          ;
              | isync          ;
              | lwz r12,0(r13) ;
exists
(a=2 /\ 1:r1=1 /\ 1:r12=0)