Test MP+PPO323

PPC MP+PPO323
"Fre LwSyncdWW Rfe DpAddrdR DpAddrdW PosWR DpDatadW PosWR DpCtrlIsyncdR"
Cycle=Rfe DpAddrdR DpAddrdW PosWR DpDatadW PosWR DpCtrlIsyncdR Fre LwSyncdWW
Relax=
Safe=Rfe Fre PosWR LwSyncdWW DpAddrdW DpAddrdR DpDatadW DpCtrlIsyncdR
Prefetch=1:x=T
Com=Rf Fr
Orig=Fre LwSyncdWW Rfe DpAddrdR DpAddrdW PosWR DpDatadW PosWR DpCtrlIsyncdR
{
0:r2=x; 0:r4=y;
1:r2=y; 1:r5=z; 1:r8=a; 1:r11=b; 1:r14=x;
}
 P0           | P1             ;
 li r1,1      | lwz r1,0(r2)   ;
 stw r1,0(r2) | xor r3,r1,r1   ;
 lwsync       | lwzx r4,r3,r5  ;
 li r3,1      | xor r6,r4,r4   ;
 stw r3,0(r4) | li r7,1        ;
              | stwx r7,r6,r8  ;
              | lwz r9,0(r8)   ;
              | xor r10,r9,r9  ;
              | addi r10,r10,1 ;
              | stw r10,0(r11) ;
              | lwz r12,0(r11) ;
              | cmpw r12,r12   ;
              | beq  LC00      ;
              | LC00:          ;
              | isync          ;
              | lwz r13,0(r14) ;
exists
(1:r1=1 /\ 1:r13=0)