Test MP+PPO288

PPC MP+PPO288
"Fre LwSyncdWW Rfe DpCtrldW PosWR DpAddrdR DpAddrdW PosWR DpCtrlIsyncdR"
Cycle=Rfe DpCtrldW PosWR DpAddrdR DpAddrdW PosWR DpCtrlIsyncdR Fre LwSyncdWW
Relax=
Safe=Rfe Fre PosWR LwSyncdWW DpAddrdW DpAddrdR DpCtrldW DpCtrlIsyncdR
Prefetch=1:x=T
Com=Rf Fr
Orig=Fre LwSyncdWW Rfe DpCtrldW PosWR DpAddrdR DpAddrdW PosWR DpCtrlIsyncdR
{
0:r2=x; 0:r4=y;
1:r2=y; 1:r4=z; 1:r8=a; 1:r11=b; 1:r14=x;
}
 P0           | P1              ;
 li r1,1      | lwz r1,0(r2)    ;
 stw r1,0(r2) | cmpw r1,r1      ;
 lwsync       | beq  LC00       ;
 li r3,1      | LC00:           ;
 stw r3,0(r4) | li r3,1         ;
              | stw r3,0(r4)    ;
              | lwz r5,0(r4)    ;
              | xor r6,r5,r5    ;
              | lwzx r7,r6,r8   ;
              | xor r9,r7,r7    ;
              | li r10,1        ;
              | stwx r10,r9,r11 ;
              | lwz r12,0(r11)  ;
              | cmpw r12,r12    ;
              | beq  LC01       ;
              | LC01:           ;
              | isync           ;
              | lwz r13,0(r14)  ;
exists
(1:r1=1 /\ 1:r13=0)