Test MP+PPO286

PPC MP+PPO286
"Fre LwSyncdWW Rfe DpAddrdW PosWR DpAddrdR DpAddrdW PosWR DpCtrlIsyncdR"
Cycle=Rfe DpAddrdW PosWR DpAddrdR DpAddrdW PosWR DpCtrlIsyncdR Fre LwSyncdWW
Relax=
Safe=Rfe Fre PosWR LwSyncdWW DpAddrdW DpAddrdR DpCtrlIsyncdR
Prefetch=1:x=T
Com=Rf Fr
Orig=Fre LwSyncdWW Rfe DpAddrdW PosWR DpAddrdR DpAddrdW PosWR DpCtrlIsyncdR
{
0:r2=x; 0:r4=y;
1:r2=y; 1:r5=z; 1:r9=a; 1:r12=b; 1:r15=x;
}
 P0           | P1               ;
 li r1,1      | lwz r1,0(r2)     ;
 stw r1,0(r2) | xor r3,r1,r1     ;
 lwsync       | li r4,1          ;
 li r3,1      | stwx r4,r3,r5    ;
 stw r3,0(r4) | lwz r6,0(r5)     ;
              | xor r7,r6,r6     ;
              | lwzx r8,r7,r9    ;
              | xor r10,r8,r8    ;
              | li r11,1         ;
              | stwx r11,r10,r12 ;
              | lwz r13,0(r12)   ;
              | cmpw r13,r13     ;
              | beq  LC00        ;
              | LC00:            ;
              | isync            ;
              | lwz r14,0(r15)   ;
exists
(1:r1=1 /\ 1:r14=0)