Test MP+PPO187

PPC MP+PPO187
"Fre LwSyncdWW Rfe DpCtrldW PosWR PosRR DpAddrdR"
Cycle=Rfe DpCtrldW PosWR PosRR DpAddrdR Fre LwSyncdWW
Relax=
Safe=Rfe Fre PosWR PosRR LwSyncdWW DpAddrdR DpCtrldW
Prefetch=1:x=T
Com=Rf Fr
Orig=Fre LwSyncdWW Rfe DpCtrldW PosWR PosRR DpAddrdR
{
0:r2=x; 0:r4=y;
1:r2=y; 1:r4=z; 1:r9=x;
}
 P0           | P1            ;
 li r1,1      | lwz r1,0(r2)  ;
 stw r1,0(r2) | cmpw r1,r1    ;
 lwsync       | beq  LC00     ;
 li r3,1      | LC00:         ;
 stw r3,0(r4) | li r3,1       ;
              | stw r3,0(r4)  ;
              | lwz r5,0(r4)  ;
              | lwz r6,0(r4)  ;
              | xor r7,r6,r6  ;
              | lwzx r8,r7,r9 ;
exists
(1:r1=1 /\ 1:r8=0)