Test MP+PPO064

PPC MP+PPO064
"Fre LwSyncdWW Rfe DpDatadW PosWR DpAddrdR DpCtrldW PosWR DpAddrdR"
Cycle=Rfe DpDatadW PosWR DpAddrdR DpCtrldW PosWR DpAddrdR Fre LwSyncdWW
Relax=
Safe=Rfe Fre PosWR LwSyncdWW DpAddrdR DpDatadW DpCtrldW
Prefetch=1:x=T
Com=Rf Fr
Orig=Fre LwSyncdWW Rfe DpDatadW PosWR DpAddrdR DpCtrldW PosWR DpAddrdR
{
0:r2=x; 0:r4=y;
1:r2=y; 1:r4=z; 1:r8=a; 1:r10=b; 1:r14=x;
}
 P0           | P1               ;
 li r1,1      | lwz r1,0(r2)     ;
 stw r1,0(r2) | xor r3,r1,r1     ;
 lwsync       | addi r3,r3,1     ;
 li r3,1      | stw r3,0(r4)     ;
 stw r3,0(r4) | lwz r5,0(r4)     ;
              | xor r6,r5,r5     ;
              | lwzx r7,r6,r8    ;
              | cmpw r7,r7       ;
              | beq  LC00        ;
              | LC00:            ;
              | li r9,1          ;
              | stw r9,0(r10)    ;
              | lwz r11,0(r10)   ;
              | xor r12,r11,r11  ;
              | lwzx r13,r12,r14 ;
exists
(1:r1=1 /\ 1:r13=0)