Test 2+2W0002

PPC 2+2W0002
"LwSyncdWW Wse PosWR DpAddrdW Wse"
Cycle=Wse PosWR DpAddrdW Wse LwSyncdWW
Relax=[Wse,LwSyncdWW,Wse]
Safe=PosWR DpAddrdW
Prefetch=0:x=F,0:y=W,1:y=F,1:x=W
Com=Ws Ws
Orig=LwSyncdWW Wse PosWR DpAddrdW Wse
{
0:r2=x; 0:r4=y;
1:r2=y; 1:r6=x;
}
 P0           | P1            ;
 li r1,2      | li r1,2       ;
 stw r1,0(r2) | stw r1,0(r2)  ;
 lwsync       | lwz r3,0(r2)  ;
 li r3,1      | xor r4,r3,r3  ;
 stw r3,0(r4) | li r5,1       ;
              | stwx r5,r4,r6 ;
exists
(x=2 /\ y=2)