ARM Z6.5+dsb+dmb.st+dsb.st
"DSBdWW Wse DMB.STdWW Wse DSB.STdWR Fre"
Cycle=Fre DSBdWW Wse DMB.STdWW Wse DSB.STdWR
Prefetch=0:x=F,0:y=W,1:y=F,1:z=W,2:z=F,2:x=T
Com=Ws Ws Fr
Orig=DSBdWW Wse DMB.STdWW Wse DSB.STdWR Fre
{
%x0=x; %y0=y;
%y1=y; %z1=z;
%z2=z; %x2=x;
}
P0 | P1 | P2 ;
MOV R0,#1 | MOV R0,#2 | MOV R0,#2 ;
STR R0,[%x0] | STR R0,[%y1] | STR R0,[%z2] ;
DSB | DMB ST | DSB ST ;
MOV R1,#1 | MOV R1,#1 | LDR R1,[%x2] ;
STR R1,[%y0] | STR R1,[%z1] | ;
Observed
2:R1=0; y=2; z=2;