ARM Z6.4+dmb.st+dsb.st+dmb.st
"DMB.STdWW Wse DSB.STdWR Fre DMB.STdWR Fre"
Cycle=Fre DMB.STdWW Wse DSB.STdWR Fre DMB.STdWR
Prefetch=0:x=F,0:y=W,1:y=F,1:z=T,2:z=F,2:x=T
Com=Ws Fr Fr
Orig=DMB.STdWW Wse DSB.STdWR Fre DMB.STdWR Fre
{
%x0=x; %y0=y;
%y1=y; %z1=z;
%z2=z; %x2=x;
}
P0 | P1 | P2 ;
MOV R0,#1 | MOV R0,#2 | MOV R0,#1 ;
STR R0,[%x0] | STR R0,[%y1] | STR R0,[%z2] ;
DMB ST | DSB ST | DMB ST ;
MOV R1,#1 | LDR R1,[%z1] | LDR R1,[%x2] ;
STR R1,[%y0] | | ;
Observed
1:R1=0; 2:R1=0; y=2;