Test WRR+2W+dsb.st+dmb.st

ARM WRR+2W+dsb.st+dmb.st
"Rfe DSB.STdRR Fre DMB.STdWW Wse"
Cycle=Rfe DSB.STdRR Fre DMB.STdWW Wse
Prefetch=0:x=F,1:x=F,1:y=T,2:y=F,2:x=W
Com=Rf Fr Ws
Orig=Rfe DSB.STdRR Fre DMB.STdWW Wse
{
%x0=x;
%x1=x; %y1=y;
%y2=y; %x2=x;
}
 P0           | P1           | P2           ;
 MOV R0,#2    | LDR R0,[%x1] | MOV R0,#1    ;
 STR R0,[%x0] | DSB ST       | STR R0,[%y2] ;
              | LDR R1,[%y1] | DMB ST       ;
              |              | MOV R1,#1    ;
              |              | STR R1,[%x2] ;
Observed
    1:R0=1; 1:R1=0; x=1;
and 1:R0=1; 1:R1=0; x=2;
and 1:R0=2; 1:R1=0; x=2;