Test S+dmb+fri-rfi-addr-pos-addr

Executions for behaviour: "1:R0=1 ; 1:R2=2 ; x=2 ; y=2"

ARM S+dmb+fri-rfi-addr-pos-addr
"DMBdWW Rfe Fri Rfi DpAddrdR PosRR DpAddrdW Wse"
Cycle=Rfi DpAddrdR PosRR DpAddrdW Wse DMBdWW Rfe Fri
Prefetch=0:x=F,0:y=W,1:y=F,1:x=W
Com=Rf Ws
Orig=DMBdWW Rfe Fri Rfi DpAddrdR PosRR DpAddrdW Wse
{
%x0=x; %y0=y;
%y1=y; %z1=z; %x1=x;
}
 P0           | P1              ;
 MOV R0,#2    | LDR R0,[%y1]    ;
 STR R0,[%x0] | MOV R1,#2       ;
 DMB          | STR R1,[%y1]    ;
 MOV R1,#1    | LDR R2,[%y1]    ;
 STR R1,[%y0] | EOR R3,R2,R2    ;
              | LDR R4,[R3,%z1] ;
              | LDR R5,[%z1]    ;
              | EOR R6,R5,R5    ;
              | MOV R7,#1       ;
              | STR R7,[R6,%x1] ;
Observed
    1:R0=1; 1:R2=2; x=2; y=2;