Test DETOUR0626

Executions for behaviour: "0:R1=0 ; 1:R1=1 ; 1:R3=1 ; 1:R4=0 ; x=1"

Executions for behaviour: "0:R1=1 ; 1:R1=1 ; 1:R3=1 ; 1:R4=0 ; x=1"

Executions for behaviour: "0:R1=0 ; 1:R1=1 ; 1:R3=2 ; 1:R4=0 ; x=1"

Executions for behaviour: "0:R1=0 ; 1:R1=1 ; 1:R3=1 ; 1:R4=0 ; x=2"

Executions for behaviour: "0:R1=1 ; 1:R1=1 ; 1:R3=1 ; 1:R4=0 ; x=2"

Executions for behaviour: "0:R1=0 ; 1:R1=1 ; 1:R3=2 ; 1:R4=0 ; x=2"

Executions for behaviour: "0:R1=0 ; 1:R1=1 ; 1:R3=2 ; 1:R4=1 ; x=2"

Executions for behaviour: "0:R1=1 ; 1:R1=1 ; 1:R3=2 ; 1:R4=1 ; x=2"

ARM DETOUR0626
"DMBdWR Fre Rfi DpAddrdR DetourR Fre"
Cycle=Rfi DpAddrdR DetourR Fre DMBdWR Fre
Prefetch=0:x=F,0:y=T,1:y=F,1:x=T
Com=Fr Fr
Orig=DMBdWR Fre Rfi DpAddrdR DetourR Fre
{
%x0=x; %y0=y;
%y1=y; %x1=x;
%x2=x;
}
 P0           | P1              | P2           ;
 MOV R0,#2    | MOV R0,#1       | MOV R0,#1    ;
 STR R0,[%x0] | STR R0,[%y1]    | STR R0,[%x2] ;
 DMB          | LDR R1,[%y1]    |              ;
 LDR R1,[%y0] | EOR R2,R1,R1    |              ;
              | LDR R3,[R2,%x1] |              ;
              | LDR R4,[%x1]    |              ;
Observed
    0:R1=0; 1:R1=1; 1:R3=1; 1:R4=0; x=1;
and 0:R1=1; 1:R1=1; 1:R3=1; 1:R4=0; x=1;
and 0:R1=0; 1:R1=1; 1:R3=2; 1:R4=0; x=1;
and 0:R1=0; 1:R1=1; 1:R3=1; 1:R4=0; x=2;
and 0:R1=1; 1:R1=1; 1:R3=1; 1:R4=0; x=2;
and 0:R1=0; 1:R1=1; 1:R3=2; 1:R4=0; x=2;
and 0:R1=0; 1:R1=1; 1:R3=2; 1:R4=1; x=2;
and 0:R1=1; 1:R1=1; 1:R3=2; 1:R4=1; x=2;