Test MP+dmb+fri-rfi-ctrlisb+REAL

Executions for behaviour: "1:R0=1 ; 1:R2=2 ; 1:R3=0 ; y=2"

ARM MP+dmb+fri-rfi-ctrlisb+REAL
"DMBdWW Rfe Fri Rfi DpCtrlIsbdR Fre"
Prefetch=0:x=F,0:y=W,1:y=F,1:x=T
Com=Rf Fr
Orig=DMBdWW Rfe Fri Rfi DpCtrlIsbdR Fre
{
%x0=x; %y0=y;
%y1=y; %x1=x; 1:R3=-1;
}
 P0           | P1           ;
 MOV R0,#1    | LDR R0,[%y1] ;
 STR R0,[%x0] | MOV R1,#2    ;
 DMB          | STR R1,[%y1] ;
 MOV R1,#1    | LDR R2,[%y1] ;
 STR R1,[%y0] | CMP R2,#2    ;
              | BNE LC00     ;
              | ISB          ;
              | LDR R3,[%x1] ;
              | LC00:        ;
Observed
    1:R0=1; 1:R2=2; 1:R3=0; y=2;