Test Z6.1+rfiana-data+dmb+data

Executions for behaviour: "0:R0=1 ; 0:R1=2 ; 2:R0=1 ; ok=1 ; x=2 ; y=2"

ARM Z6.1+rfiana-data+dmb+data
"RfiANa DpDatadW Wse DMBdWW Rfe DpDatadW WseNaA"
Cycle=RfiANa DpDatadW Wse DMBdWW Rfe DpDatadW WseNaA
Prefetch=0:x=F,0:y=W,1:y=F,1:z=W,2:z=F,2:x=W
Com=Ws Rf Ws
Orig=RfiANa DpDatadW Wse DMBdWW Rfe DpDatadW WseNaA
{ ok=1;
%x0=x; %y0=y; %ok0=ok;
%y1=y; %z1=z;
%z2=z; %x2=x;
}
 P0                  | P1           | P2           ;
 MOV %T3,#2          | MOV R0,#2    | LDR R0,[%z2] ;
 LDREX R0,[%x0]      | STR R0,[%y1] | EOR R1,R0,R0 ;
 STREX %T2,%T3,[%x0] | DMB          | ADD R1,R1,#1 ;
 CMP %T2,#0          | MOV R1,#1    | STR R1,[%x2] ;
 BNE Fail0           | STR R1,[%z1] |              ;
 LDR R1,[%x0]        |              |              ;
 EOR R2,R1,R1        |              |              ;
 ADD R2,R2,#1        |              |              ;
 STR R2,[%y0]        |              |              ;
 B Exit0             |              |              ;
 Fail0:              |              |              ;
 MOV R3,#0           |              |              ;
 STR R3,[%ok0]       |              |              ;
 Exit0:              |              |              ;
Observed
    0:R0=1; 0:R1=2; 2:R0=1; ok=1; x=2; y=2;