Test WWC+poaa+addr

Executions for behaviour: "1:R0=2 ; 1:R1=0 ; 2:R0=1 ; ok=1 ; x=2 ; y=1"

ARM WWC+poaa+addr
"RfeNaA PodRWAA RfeANa DpAddrdW Wse"
Cycle=RfeNaA PodRWAA RfeANa DpAddrdW Wse
Prefetch=1:x=F,1:y=W,2:y=F,2:x=W
Com=Rf Rf Ws
Orig=RfeNaA PodRWAA RfeANa DpAddrdW Wse
{ ok=1;
%x0=x;
%x1=x; %y1=y; %ok1=ok;
%y2=y; %x2=x;
}
 P0           | P1                  | P2              ;
 MOV R0,#2    | LDREX R0,[%x1]      | LDR R0,[%y2]    ;
 STR R0,[%x0] | STREX %T2,R0,[%x1]  | EOR R1,R0,R0    ;
              | CMP %T2,#0          | MOV R2,#1       ;
              | BNE Fail1           | STR R2,[R1,%x2] ;
              | MOV %T3,#1          |                 ;
              | LDREX R1,[%y1]      |                 ;
              | STREX %T2,%T3,[%y1] |                 ;
              | CMP %T2,#0          |                 ;
              | BNE Fail1           |                 ;
              | B Exit1             |                 ;
              | Fail1:              |                 ;
              | MOV R2,#0           |                 ;
              | STR R2,[%ok1]       |                 ;
              | Exit1:              |                 ;
Observed
    1:R0=2; 1:R1=0; 2:R0=1; ok=1; x=2; y=1;