Test MP+dmbaa+poar

ARM MP+dmbaa+poar
"DMBdWWAA RfeAA PodRRAR FreRA"
Cycle=RfeAA PodRRAR FreRA DMBdWWAA
Prefetch=0:x=F,0:y=W,1:y=F,1:x=T
Com=Rf Fr
Orig=DMBdWWAA RfeAA PodRRAR FreRA
{ ok=1;
%x0=x; %y0=y; %ok0=ok;
%y1=y; %x1=x; %ok1=ok;
}
 P0                  | P1                 ;
 MOV %T3,#1          | LDREX R0,[%y1]     ;
 LDREX R0,[%x0]      | STREX %T2,R0,[%y1] ;
 STREX %T2,%T3,[%x0] | CMP %T2,#0         ;
 CMP %T2,#0          | BNE Fail1          ;
 BNE Fail0           | LDREX R1,[%x1]     ;
 DMB                 | B Exit1            ;
 MOV %T3,#1          | Fail1:             ;
 LDREX R1,[%y0]      | MOV R2,#0          ;
 STREX %T2,%T3,[%y0] | STR R2,[%ok1]      ;
 CMP %T2,#0          | Exit1:             ;
 BNE Fail0           |                    ;
 B Exit0             |                    ;
 Fail0:              |                    ;
 MOV R2,#0           |                    ;
 STR R2,[%ok0]       |                    ;
 Exit0:              |                    ;
Observed
    0:R0=0; 0:R1=0; 1:R0=1; 1:R1=0; ok=1; x=1; y=1;