Test R+rfinar-datarna+rfi-addr

Executions for behaviour: "0:R1=0 ; 1:R1=1 ; 1:R3=0 ; y=1"

Executions for behaviour: "0:R1=0 ; 1:R1=2 ; 1:R3=0 ; y=1"

Executions for behaviour: "0:R1=0 ; 1:R1=1 ; 1:R3=1 ; y=1"

Executions for behaviour: "0:R1=0 ; 1:R1=2 ; 1:R3=1 ; y=1"

Executions for behaviour: "0:R1=0 ; 1:R1=2 ; 1:R3=0 ; y=2"

Executions for behaviour: "0:R1=0 ; 1:R1=2 ; 1:R3=1 ; y=2"

ARM R+rfinar-datarna+rfi-addr
"RfiNaR DpDatadWRNa Wse Rfi DpAddrdR Fre"
Cycle=Rfi DpAddrdR Fre RfiNaR DpDatadWRNa Wse
Prefetch=0:x=F,0:y=W,1:y=F,1:x=T
Com=Ws Fr
Orig=RfiNaR DpDatadWRNa Wse Rfi DpAddrdR Fre
{
%x0=x; %y0=y;
%y1=y; %x1=x;
}
 P0             | P1              ;
 MOV R0,#1      | MOV R0,#2       ;
 STR R0,[%x0]   | STR R0,[%y1]    ;
 LDREX R1,[%x0] | LDR R1,[%y1]    ;
 EOR R2,R1,R1   | EOR R2,R1,R1    ;
 ADD R2,R2,#1   | LDR R3,[R2,%x1] ;
 STR R2,[%y0]   |                 ;
Observed
    0:R1=0; 1:R1=1; 1:R3=0; y=1;
and 0:R1=0; 1:R1=2; 1:R3=0; y=1;
and 0:R1=0; 1:R1=1; 1:R3=1; y=1;
and 0:R1=0; 1:R1=2; 1:R3=1; y=1;
and 0:R1=0; 1:R1=2; 1:R3=0; y=2;
and 0:R1=0; 1:R1=2; 1:R3=1; y=2;