Test WRW+2W+pora+dmb

Executions for behaviour: "1:R0=1 ; 1:R1=0 ; ok=0 ; x=1 ; y=2"

Executions for behaviour: "1:R0=1 ; 1:R1=0 ; ok=1 ; x=1 ; y=2"

Executions for behaviour: "1:R0=1 ; 1:R1=0 ; ok=0 ; x=2 ; y=2"

Executions for behaviour: "1:R0=1 ; 1:R1=0 ; ok=1 ; x=2 ; y=2"

ARM WRW+2W+pora+dmb
"RfeNaR PodRWRA WseANa DMBdWW Wse"
Cycle=RfeNaR PodRWRA WseANa DMBdWW Wse
Prefetch=1:x=F,1:y=W,2:y=F,2:x=W
Com=Rf Ws Ws
Orig=RfeNaR PodRWRA WseANa DMBdWW Wse
{ ok=1;
%x0=x;
%x1=x; %y1=y; %ok1=ok;
%y2=y; %x2=x;
}
 P0           | P1                  | P2           ;
 MOV R0,#2    | LDREX R0,[%x1]      | MOV R0,#2    ;
 STR R0,[%x0] | MOV %T3,#1          | STR R0,[%y2] ;
              | LDREX R1,[%y1]      | DMB          ;
              | STREX %T2,%T3,[%y1] | MOV R1,#1    ;
              | CMP %T2,#0          | STR R1,[%x2] ;
              | BNE Fail1           |              ;
              | B Exit1             |              ;
              | Fail1:              |              ;
              | MOV R2,#0           |              ;
              | STR R2,[%ok1]       |              ;
              | Exit1:              |              ;
Observed
    1:R0=1; 1:R1=0; ok=0; x=1; y=2;
and 1:R0=1; 1:R1=0; ok=1; x=1; y=2;
and 1:R0=1; 1:R1=0; ok=0; x=2; y=2;
and 1:R0=1; 1:R1=0; ok=1; x=2; y=2;