Executions for behaviour:
"1:R0=1 ; 1:R1=2 ; 1:R3=0 ; ok=1 ; y=2"
ARM R+dmb+rfiar-addrrna "DMBdWW WseNaA RfiAR DpAddrdRRNa Fre" Cycle=RfiAR DpAddrdRRNa Fre DMBdWW WseNaA Prefetch=0:x=F,0:y=W,1:y=F,1:x=T Com=Ws Fr Orig=DMBdWW WseNaA RfiAR DpAddrdRRNa Fre { ok=1; %x0=x; %y0=y; %y1=y; %x1=x; %ok1=ok; } P0 | P1 ; MOV R0,#1 | MOV %T3,#2 ; STR R0,[%x0] | LDREX R0,[%y1] ; DMB | STREX %T2,%T3,[%y1] ; MOV R1,#1 | CMP %T2,#0 ; STR R1,[%y0] | BNE Fail1 ; | LDREX R1,[%y1] ; | EOR R2,R1,R1 ; | LDR R3,[R2,%x1] ; | B Exit1 ; | Fail1: ; | MOV R4,#0 ; | STR R4,[%ok1] ; | Exit1: ; Observed 1:R0=1; 1:R1=2; 1:R3=0; ok=1; y=2;