Executions for behaviour:
"0:R0=0 ; 0:R1=0 ; 1:R0=1 ; 1:R2=0 ; ok=1 ; x=1 ; y=1"
ARM MP+poaa+addrra
"PodWWAA RfeAR DpAddrdRRA FreAA"
Cycle=RfeAR DpAddrdRRA FreAA PodWWAA
Prefetch=0:x=F,0:y=W,1:y=F,1:x=T
Com=Rf Fr
Orig=PodWWAA RfeAR DpAddrdRRA FreAA
{ ok=1;
%x0=x; %y0=y; %ok0=ok;
%y1=y; %x1=x; %ok1=ok;
}
P0 | P1 ;
MOV %T3,#1 | LDREX R0,[%y1] ;
LDREX R0,[%x0] | EOR R1,R0,R0 ;
STREX %T2,%T3,[%x0] | ADD %T1,R1,%x1 ;
CMP %T2,#0 | LDREX R2,[%T1] ;
BNE Fail0 | STREX %T2,R2,[%T1] ;
MOV %T3,#1 | CMP %T2,#0 ;
LDREX R1,[%y0] | BNE Fail1 ;
STREX %T2,%T3,[%y0] | B Exit1 ;
CMP %T2,#0 | Fail1: ;
BNE Fail0 | MOV R3,#0 ;
B Exit0 | STR R3,[%ok1] ;
Fail0: | Exit1: ;
MOV R2,#0 | ;
STR R2,[%ok0] | ;
Exit0: | ;
Observed
0:R0=0; 0:R1=0; 1:R0=1; 1:R2=0; ok=1; x=1; y=1;