Test LB+ctrlnaa+pora

Executions for behaviour: "0:R0=1 ; 0:R1=0 ; 1:R0=1 ; 1:R1=0 ; ok=1 ; x=1 ; y=1"

ARM LB+ctrlnaa+pora
"DpCtrldWNaA RfeAR PodRWRA RfeANa"
Cycle=RfeANa DpCtrldWNaA RfeAR PodRWRA
Prefetch=0:x=F,0:y=W,1:y=F,1:x=W
Com=Rf Rf
Orig=DpCtrldWNaA RfeAR PodRWRA RfeANa
{ ok=1;
%x0=x; %y0=y; %ok0=ok;
%y1=y; %x1=x; %ok1=ok;
}
 P0                  | P1                  ;
 LDR R0,[%x0]        | LDREX R0,[%y1]      ;
 CMP R0,R0           | MOV %T3,#1          ;
 BNE LC00            | LDREX R1,[%x1]      ;
 LC00:               | STREX %T2,%T3,[%x1] ;
 MOV %T3,#1          | CMP %T2,#0          ;
 LDREX R1,[%y0]      | BNE Fail1           ;
 STREX %T2,%T3,[%y0] | B Exit1             ;
 CMP %T2,#0          | Fail1:              ;
 BNE Fail0           | MOV R2,#0           ;
 B Exit0             | STR R2,[%ok1]       ;
 Fail0:              | Exit1:              ;
 MOV R2,#0           |                     ;
 STR R2,[%ok0]       |                     ;
 Exit0:              |                     ;
Observed
    0:R0=1; 0:R1=0; 1:R0=1; 1:R1=0; ok=1; x=1; y=1;