Executions for behaviour:
"0:R0=0 ; 1:R0=1 ; 1:R2=0 ; 2:R0=0 ; 3:R0=1 ; 3:R1=0 ; ok=1 ; x=1 ; y=1"
ARM IRIW+addrnaa+poaa+AA
"RfeANa DpAddrdRNaA FreAA RfeAA PodRRAA FreAA"
Cycle=RfeANa DpAddrdRNaA FreAA RfeAA PodRRAA FreAA
Prefetch=1:x=F,1:y=T,3:y=F,3:x=T
Com=Rf Fr Rf Fr
Orig=RfeANa DpAddrdRNaA FreAA RfeAA PodRRAA FreAA
{ ok=1;
%x0=x; %ok0=ok;
%x1=x; %y1=y; %ok1=ok;
%y2=y; %ok2=ok;
%y3=y; %x3=x; %ok3=ok;
}
P0 | P1 | P2 | P3 ;
MOV %T3,#1 | LDR R0,[%x1] | MOV %T3,#1 | LDREX R0,[%y3] ;
LDREX R0,[%x0] | EOR R1,R0,R0 | LDREX R0,[%y2] | STREX %T2,R0,[%y3] ;
STREX %T2,%T3,[%x0] | ADD %T1,R1,%y1 | STREX %T2,%T3,[%y2] | CMP %T2,#0 ;
CMP %T2,#0 | LDREX R2,[%T1] | CMP %T2,#0 | BNE Fail3 ;
BNE Fail0 | STREX %T2,R2,[%T1] | BNE Fail2 | LDREX R1,[%x3] ;
B Exit0 | CMP %T2,#0 | B Exit2 | STREX %T2,R1,[%x3] ;
Fail0: | BNE Fail1 | Fail2: | CMP %T2,#0 ;
MOV R1,#0 | B Exit1 | MOV R1,#0 | BNE Fail3 ;
STR R1,[%ok0] | Fail1: | STR R1,[%ok2] | B Exit3 ;
Exit0: | MOV R3,#0 | Exit2: | Fail3: ;
| STR R3,[%ok1] | | MOV R2,#0 ;
| Exit1: | | STR R2,[%ok3] ;
| | | Exit3: ;
Observed
0:R0=0; 1:R0=1; 1:R2=0; 2:R0=0; 3:R0=1; 3:R1=0; ok=1; x=1; y=1;