Executions for behaviour:
"0:R1=1 ; 1:R0=0 ; 1:R1=1 ; 2:R0=1 ; 2:R1=2 ; ok=1 ; x=1 ; y=1 ; z=2"
ARM 3.2W+rfi-data+rfiana-data+rfiar-datarna
"Rfi DpDatadW WseNaA RfiANa DpDatadW WseNaA RfiAR DpDatadWRNa Wse"
Cycle=Rfi DpDatadW WseNaA RfiANa DpDatadW WseNaA RfiAR DpDatadWRNa Wse
Prefetch=0:x=F,0:y=W,1:y=F,1:z=W,2:z=F,2:x=W
Com=Ws Ws Ws
Orig=Rfi DpDatadW WseNaA RfiANa DpDatadW WseNaA RfiAR DpDatadWRNa Wse
{ ok=1;
%x0=x; %y0=y;
%y1=y; %z1=z; %ok1=ok;
%z2=z; %x2=x; %ok2=ok;
}
P0 | P1 | P2 ;
MOV R0,#2 | MOV %T3,#2 | MOV %T3,#2 ;
STR R0,[%x0] | LDREX R0,[%y1] | LDREX R0,[%z2] ;
LDR R1,[%x0] | STREX %T2,%T3,[%y1] | STREX %T2,%T3,[%z2] ;
EOR R2,R1,R1 | CMP %T2,#0 | CMP %T2,#0 ;
ADD R2,R2,#1 | BNE Fail1 | BNE Fail2 ;
STR R2,[%y0] | LDR R1,[%y1] | LDREX R1,[%z2] ;
| EOR R2,R1,R1 | EOR R2,R1,R1 ;
| ADD R2,R2,#1 | ADD R2,R2,#1 ;
| STR R2,[%z1] | STR R2,[%x2] ;
| B Exit1 | B Exit2 ;
| Fail1: | Fail2: ;
| MOV R3,#0 | MOV R3,#0 ;
| STR R3,[%ok1] | STR R3,[%ok2] ;
| Exit1: | Exit2: ;
Observed
0:R1=1; 1:R0=0; 1:R1=1; 2:R0=1; 2:R1=2; ok=1; x=1; y=1; z=2;