Test 3.2W+rfi-data+rfi-data+rfiar-datarna

Executions for behaviour: "0:R1=1 ; 1:R1=1 ; 2:R0=1 ; 2:R1=2 ; ok=1 ; x=1 ; y=1 ; z=2"

ARM 3.2W+rfi-data+rfi-data+rfiar-datarna
"Rfi DpDatadW Wse Rfi DpDatadW WseNaA RfiAR DpDatadWRNa Wse"
Cycle=Rfi DpDatadW Wse Rfi DpDatadW WseNaA RfiAR DpDatadWRNa Wse
Prefetch=0:x=F,0:y=W,1:y=F,1:z=W,2:z=F,2:x=W
Com=Ws Ws Ws
Orig=Rfi DpDatadW Wse Rfi DpDatadW WseNaA RfiAR DpDatadWRNa Wse
{ ok=1;
%x0=x; %y0=y;
%y1=y; %z1=z;
%z2=z; %x2=x; %ok2=ok;
}
 P0           | P1           | P2                  ;
 MOV R0,#2    | MOV R0,#2    | MOV %T3,#2          ;
 STR R0,[%x0] | STR R0,[%y1] | LDREX R0,[%z2]      ;
 LDR R1,[%x0] | LDR R1,[%y1] | STREX %T2,%T3,[%z2] ;
 EOR R2,R1,R1 | EOR R2,R1,R1 | CMP %T2,#0          ;
 ADD R2,R2,#1 | ADD R2,R2,#1 | BNE Fail2           ;
 STR R2,[%y0] | STR R2,[%z1] | LDREX R1,[%z2]      ;
              |              | EOR R2,R1,R1        ;
              |              | ADD R2,R2,#1        ;
              |              | STR R2,[%x2]        ;
              |              | B Exit2             ;
              |              | Fail2:              ;
              |              | MOV R3,#0           ;
              |              | STR R3,[%ok2]       ;
              |              | Exit2:              ;
Observed
    0:R1=1; 1:R1=1; 2:R0=1; 2:R1=2; ok=1; x=1; y=1; z=2;