Test WWC+addranas

ARM WWC+addranas
"RfeNaA DpAddrdWANa RfeNaA DpAddrdWANa Wse"
Cycle=RfeNaA DpAddrdWANa RfeNaA DpAddrdWANa Wse
Prefetch=1:x=F,1:y=W,2:y=F,2:x=W
Com=Rf Rf Ws
Orig=RfeNaA DpAddrdWANa RfeNaA DpAddrdWANa Wse
{ ok=1;
%x0=x;
%x1=x; %y1=y; %ok1=ok;
%y2=y; %x2=x; %ok2=ok;
}
 P0           | P1                 | P2                 ;
 MOV R0,#2    | LDREX R0,[%x1]     | LDREX R0,[%y2]     ;
 STR R0,[%x0] | STREX %T2,R0,[%x1] | STREX %T2,R0,[%y2] ;
              | CMP %T2,#0         | CMP %T2,#0         ;
              | BNE Fail1          | BNE Fail2          ;
              | EOR R1,R0,R0       | EOR R1,R0,R0       ;
              | MOV R2,#1          | MOV R2,#1          ;
              | STR R2,[R1,%y1]    | STR R2,[R1,%x2]    ;
              | B Exit1            | B Exit2            ;
              | Fail1:             | Fail2:             ;
              | MOV R3,#0          | MOV R3,#0          ;
              | STR R3,[%ok1]      | STR R3,[%ok2]      ;
              | Exit1:             | Exit2:             ;
Observed
    1:R0=2; 2:R0=1; ok=1; x=2; y=1;